In synchronous communications, the sender and receiver must synchronize with one another before data is sent. To maintain clock synchronization over long periods, a special bit-transition pattern is embedded in the digital signal that assists in maintaining the timing between sender and receiver.
| Game | Time | WPM | Accuracy |
|---|---|---|---|
| 290582 | 2019-03-21 17:17:47 | 132.92 | 98% |
| 289897 | 2019-03-18 02:55:25 | 131.60 | 97% |
| 260697 | 2018-09-28 20:32:26 | 151.56 | 98% |
| 259537 | 2018-09-24 04:12:12 | 143.62 | 98% |
| 246571 | 2018-08-28 21:23:16 | 123.05 | 98% |
| 245174 | 2018-08-27 05:24:53 | 122.27 | 96% |
| 223141 | 2018-01-18 04:49:52 | 112.59 | 97% |
| 214339 | 2017-12-12 00:45:05 | 138.47 | 99% |
| 212040 | 2017-11-28 22:13:54 | 146.43 | 98% |
| 203945 | 2017-11-18 17:23:43 | 136.48 | 98% |
| 203801 | 2017-11-16 23:45:50 | 141.92 | 99% |
| 191720 | 2017-10-02 01:50:59 | 139.69 | 96% |
| 175866 | 2017-06-23 04:31:14 | 139.51 | 98% |
| 171754 | 2017-06-07 22:18:52 | 121.09 | 97% |
| 168854 | 2017-05-30 16:14:31 | 129.33 | 94% |
| 168716 | 2017-05-29 22:11:59 | 122.55 | 86% |
| 168365 | 2017-05-29 04:51:43 | 156.72 | 97% |
| 168108 | 2017-05-28 20:26:16 | 150.13 | 96% |
| 165837 | 2017-05-21 02:48:56 | 150.83 | 93% |
| 162581 | 2017-05-08 15:33:15 | 127.86 | 93% |
| 158460 | 2017-04-17 18:07:12 | 111.66 | 100% |
| 158015 | 2017-04-16 04:22:03 | 133.94 | 96% |
| 157607 | 2017-04-15 17:35:30 | 160.74 | 99% |
| 157606 | 2017-04-15 17:24:15 | 147.71 | 97% |
| 156936 | 2017-04-11 22:32:42 | 132.75 | 94% |
| 156790 | 2017-04-10 20:21:30 | 114.98 | 89% |
| 136474 | 2017-01-20 02:19:13 | 113.77 | 91% |
| 135883 | 2017-01-17 01:13:39 | 135.63 | 97% |